The present invention is directed to a ferroelectric capacitor having a silicon/dielectric/metal structure.
Presently, silicon dioxide is used as the dielectric in the storage capacitor of dynamic random access memory (DRAM) cells. However, as densities increase to the 64 M-bit range and beyond, charge storage using a SiO.sub.2 capacitor requires a large amount of space (area) due to the low dielectric constant of SiO.sub.2, which is approximately 3.9. The large area required by these capacitors results in the capacitor being too large to be of practical use in the industry. As a result, the industry has been in search of a material to replace silicon dioxide as the dielectric in a capacitor. With a larger dielectric constant, assuming the separation between capacitor plates remains the same, the same capacitance is obtained using a smaller area.
One material that has been considered for possible use as the dielectric in a capacitor is a ferroelectric material, such as a compound comprising lead zirconate titanate ("PZT"). Ferroelectric materials are of interest because materials such as PZT have a high dielectric constant. In U.S. Pat. No. 4,853,893 to Eaton, Jr. and Parris, owned by Ramtron Corporation of Colorado Springs, Colo., there is a discussion of using PZT as a dielectric material for a DRAM memory cell capacitor. That citation calls for substituting PZT for SiO.sub.2. Col. 9, line 57 et seq. see also, U.S. Pat. No. 4,536,785 to Gibbons.
However, when a ferroelectric material is established on a silicon substrate, interdiffusion occurs between the ferroelectric material and the silicon substrate. As a result, a low dielectric constant layer is formed in series with the ferroelectric material causing the resulting structure (a stack) to appear as two capacitors in series, one with a low dielectric constant and one with a high dielectric constant (the ferroelectric material). This causes the effective dielectric constant of the entire stack to decrease two orders of magnitude. The two order decrease occurs because the existence of the low dielectric constant layer dominates the total capacitance of the entire stack. Accordingly, the result is a capacitor with an average capacitance rather than one with a very high capacitance as would be obtained when using a ferroelectric material without a low dielectric constant layer in series with it.
The use of a high dielectric constant stack comprising a buffer layer, a layer of ferroelectric material and a second buffer layer as the gate dielectric in a field effect transistor is the subject of an invention and companion patent application entitled Structure and Fabrication of High Transconductance MOS Field Effect Transistor Using A Buffer Layer/Ferroelectric/Buffer Layer Stack as the Gate Dielectric by the same inventors as this application, George Argos, Jr. and T. S. Kalkur (attorney docket no. RAM 342) and which is incorporated herein by reference.
The object of the present invention is to provide a capacitor and method of fabrication therefor which does not suffer from the serious drawbacks we have described.